The present invention relates to a semiconductor device formed on a semiconductor substrate, and more particularly to a semiconductor memory device composed of insulated gate field effect transistors.
In a semiconductor memory device, in accordance with the progress of the patterning technique and the reduction of the transistor size, an area of a memory cell is being more and more reduced year by year. Especially in a static type semiconductor memory device employing a flip-flop circuits as a memory cells, the proportion of the area of the memory cells to that of the entire chip is larger than in a dynamic type semiconductor device. Hence, contribution of the reduction of the area of the memory cell to the miniaturization of the pattern is larger in the former type. However, the reduction of the memory cell area would naturally bring about reduction of an electrostatic capacitance associated with the nodes for cross-connection of the transistors forming the flip-flop. Accordingly, an electric charge quantity to be stored at the node is reduced.
On the other hand, in order to achieve reduction of power consumption upon stand-by of the static type semiconductor memory device, a polycrystalline silicon resistor of several M ohm to several G ohm has been used as a load in the memory cell. If an electric charge quantity to be stored in the cross-connection nodes of a static type memory cell becomes small and a load resistance for supplementing the electric charge becomes large as described above, then the so-called "soft error" comes into question.
"Soft error" implies destruction of stored data in a memory caused by .alpha.-rays as reported by T. C. May in 1978 on the International Reliability Physics Symposium. In more particular, when the .alpha.-rays generated upon disintegration of natural radioactive elements such as uranium, and thorium which are present in a package material in the amount of PPM units, penetrate through the memory array region, electron-positive hole pairs are formed in the silicon substrate and these electrons would lower the positive potential held by the electric charge stored at the cross-connection points. Consequently, inversion of the memory cell information would arise.
Immediately after an information has been written in a static memory cell, either one of the cross-connection points of the flip-flop takes a potential that is lower than the address potential by a value of single threshold voltage of a gate transistor, and if the .alpha.-rays should strike against this cross-connection point before the point is raised up to a higher potential through the load, in the case where the stored electric charge quantity is small, the potential at the cross-connection point would become smaller than the gate threshold voltage of the flip-flop transistor, and sometimes inversion of the flip-flop circuit would arise. In other words, if the load resistance is high, in a certain period the static type memory cell can be considered similarly to the dynamic type memory cell.
As one measures for preventing the soft error caused by the .alpha.-rays, it will be conceived to select the static capacitance at the cross-connection nodes in the flip-flop as large that the flip-flop may not be inverted. However, enlargement of the capacitance at the cross-connection point would necessarily result in enlargement of the plane configuration of the memory cell, which is contrary to the recent tendency to reduce the size of the memory cell. Hence, obviously it would greatly hinder the high density integration of memory cells.
In addition, not only in the above-described static type memory cells, but also generally in a circuit making use of insulated gate field effect transistors, especially in a dynamic circuit which utilizes a temporary memory effect of a gate section in an insulated gate field effect transistor such as, for example, a dynamic shift register and a dynamic type frequency-divider circuit, there exists the problem that due to penetration of the .alpha.-rays through the gate section of the field effect transistor, disappearance of an electric charge stored at the gate section would occur and thereby a correct logic information would be lost.